The present technology relates to a signal processing device and method, an imaging device, and a solid state imaging element, and particularly to a signal processing device and method, an imaging device, and a solid state imaging element that are able to suppress an occurrence of a spurious signal.
In a column ADC circuit in an imaging element in the related art, an A/D conversion is performed by a comparator circuit comparing a reference voltage with a vertical signal line (VSL) in contact to an output terminal of a source follower circuit that performs pixel signal reading.
Generally, the vertical signal line (VSL) is connected directly to the comparator circuit. For this reason, there is a concern that when an output fluctuation in the vertical signal line (VSL) occurs during an A/D conversion period, an error occurs in a signal that is originally intended to be read and a resultant spurious signal is A/D-converted.
So, the technique in which a disconnection switch is provided in the vertical signal line (VSL) is provided as a technique that suppresses the output fluctuation (for example, refer to Japanese Unexamined Patent Application Publication No. 2008-67107).